1. Field of the Invention
The invention relates to a method of fabricating a flash memory cell, and more particularly, to a method of fabricating a high density flash memory cell with a self-aligned tunneling window.
2. Description of the Related Art
Recently, the wide application of memories with a high density in many fields have evoked a great attention. One of the reasons is that the memory cell and the fabrication cost can be greatly reduced. However, using the conventional local oxidation isolation (LOCOS) technique restricts the development of the fabrication technique in the deep sub-micron process.
The development of shallow trench isolation has resolved the restriction of the local oxidation isolation technique. A memory with a high density can be fabricated with a further shrunk dimension.
In a conventional flash memory cell, a tunneling oxide layer is formed between a controlling gate and a floating gate instead of being formed on the surface of the source/drain region. Therefore, the electron is tunneled in and out of the floating gate by way of a semiconductor channel. The way of electron tunneling comprises a Fowler Nordheim (FN) tunneling, a channel hot electron injection (CHEI), a band-to-band tunneling induced hot carrier injection (BBHC), or other mechanism.
No matter which way of electron tunneling is employed, an operation voltage has to reach a certain value during a reading, programming, or erasing process. Thus causes a restriction of layout.